Ideally, advances in microprocessor design would directly translate to performance improvements in software. In reality, this often involves a manual process of tuning a sophisticated production compiler or hardware-specific rewriting of code. This process is challenging even for the few experts who possess the required range of skills. Moreover, any errors introduced in this process affect the entire software stack and might compromise its reliability and security.

The growing variety and complexity of hardware designs, spanning the spectrum of low-power and high-performance computing, makes it even more challenging for software development to keep up. Practitioners argue that general-purpose optimizing compilers are falling further behind the actual capabilities of modern processors.

The goal of our work is to enable software to take full advantage of the capabilities of new microprocessor designs without modifying the compiler.

Towards this end, we are developing a novel compiler architecture that

  • Uses constraint solving to generate efficient code
  • Guarantees that the generated code correctly implements the source code
  • Provides fine-grained control over compilation time versus quality of generated code: if a programmer increases the time budget allotted for compilation, our approach will generate increasingly better code in terms of running time, code size, power consumption, energy efficiency, etc
  • Incorporates cost models that accurately reflect modern microarchitecture features, such as multiple issue, different register banks, different decode speeds, memory latency