;================================================================= ; lpc9107 SFR equates ;================================================================= P0 equ 80h; P0M1x equ 84h; P0M2x equ 85h; P1 equ 90h; P1M1x equ 91h; P1M2x equ 92h; ;------------------ PSW equ 0D0h; ACC equ 0E0h; B equ 0F0h; SP equ 81h; DPL equ 82h; DPH equ 83h; ;------------------ AUXR1 equ 0A2h; CMP1 equ 0ACh; DIVM equ 95h; FMADRH equ 0E7h; FMADRL equ 0E6h; FMCON equ 0E4h; FMDATA equ 0E5h; IEN0 equ 0A8h; IEN1 equ 0E8h; IP0 equ 0B8h; IP0H equ 0B7h; IP1 equ 0F8h; IP1H equ 0F7h; KBCON equ 94h; KBMASK equ 86h; KBPATN equ 93h; PCON equ 87h; PCONA equ 0B5h; PCONB equ 0B6h; PT0AD equ 0F6h; RSTSRC equ 0DFh; RTCCON equ 0D1h; RTCH equ 0D2h; RTCL equ 0D3h; SADDR equ 0A9h SADEN equ 0B9h SBUF equ 99h SCON equ 98h SSTAT equ 0BAh TCON equ 88h; TH0 equ 8Ch; TH1 equ 8Dh; TL0 equ 8Ah; TL1 equ 8Bh; TMOD equ 89h; TRIM equ 96h; WDCON equ 0A7h; WDL equ 0C1h; WFEED1 equ 0C2h; WFEED2 equ 0C3h; ADCON1 equ 97h ADINS equ 0A3h ADMODA equ 0C0h ADMODB equ 0A1h AD1BH equ 0C4h AD1BL equ 0BCh AD1DAT0 equ 0D5h AD1DAT1 equ 0D6h AD1DAT2 equ 0D7h AD1DAT3 equ 0F5h EA equ 0AFh ET0 equ 0A9h EAD equ 0EFh ;================================================================= ; SPI Definitions ;================================================================= D_C equ P0.5 Rst equ P0.7 D1DAT equ P1.0 D0CLK equ P1.1 LED equ P1.2 ;status LED ;================================================================= ; Temporary Information ;================================================================= dc_flag equ 40h ;Data/Command flag data_val equ 41h ;Data value fontwidth equ 05h ;width of the font ;;================================================================= ; Other equates ;================================================================= stack equ 2Fh ;begin stack after last bit memory location in internal RAM count equ 2Eh ;stores the timer interrupt counter rcount equ 100d ;counter reload value ;================================================================= ; 16 bit hex delays based on 14.7456MHz RC Oscillator (2 clk / cycle) ;================================================================= t0high equ 70h ; 5.0 msec t0low equ 00h ;================================================================= ; lpc9107 hardware vectors ;================================================================= org 0000h ; power up and reset vector ajmp init org 0003h ; interrupt 0 vector ajmp init org 000Bh ; timer 0 interrupt vector ajmp timer_isr org 0013h ; interrupt 1 vector ajmp init org 001Bh ; timer 1 interrupt vector ajmp init org 0023h ; serial port interrupt vector ajmp init org 002Bh ; brown out interrupt vector ajmp init org 003Bh ; KB interrupt vector ajmp init org 0043h ; comparator interrupt vector ajmp init org 0053h ; watchdog/rtc interrupt vector ajmp init org 006Bh ; TI interrupt vector ajmp init org 0073h ; ADC interrupt vector ajmp adc_isr org 0078h init: ;programme all lpc9107 pins for quasi bidirectional mov a, TRIM setb acc.7 setb acc.1 mov TRIM, a ;Port0... ; Pin 0.1 = input ; Pin 0.2 = input ; Pin 0.3 = input ; Pin 0.4 = input ; Pin 0.5 = output ; Pin 0.7 = output mov P0M1x, #00011110b mov P0M2x, #10100000b ;Port1... ; Pin 1.0 = bidirectional ; Pin 1.1 = bidirectional ; Pin 1.2 = output mov P1M1x, #00000000b mov P1M2x, #00000100b mov DIVM, #00h clr EA ; disable interrupts ; timer init - 14.7456MHz RC Oscillator (5 msec) ;set T0 initial count mov TH0, #t0high ; init reload count (high) mov TL0, #t0low ; init reload count (low) mov tmod, #00000001b ; sets T0 for mode 1 (16bit Mode 1) mov tcon, #00010000b ; start running T0 mov count, #rcount ; initialise the count reload setb ET0 ; enable T0 interrupt ;initialise ADC mov ADCON1, #01001101b ; enable ADC and associated interrupt flag mov ADMODA, #01000000b ; enable autoscan continuous conversion mov ADMODB, #10000000b ; set clock divide (14M / 5 = 2.8MHz) mov ADINS, #11110000b ; select channels setb EAD ; enable ADC interrupt mov SP, #stack ; initialize the stack pointer setb EA ; enable all interrupts ;wait for power-on reset sequence lcall long_delay mov a, #0AEh lcall send_cmd mov a, #8Dh lcall send_cmd mov a, #14h lcall send_cmd mov a, #81h lcall send_cmd mov a, #0FFh lcall send_cmd mov a, #20h lcall send_cmd mov a, #00h lcall send_cmd mov a, #0AFh lcall send_cmd lcall clear main: mov r5, #00d lcall setstart inc r5 mov dptr, #string1 lcall writestr mov a, AD1DAT0 acall binasc lcall writetable mov a, r2 lcall writetable lcall setstart inc r5 mov dptr, #string2 lcall writestr mov a, AD1DAT1 acall binasc lcall writetable mov a, r2 lcall writetable lcall setstart inc r5 mov dptr, #string3 lcall writestr mov a, AD1DAT2 acall binasc lcall writetable mov a, r2 lcall writetable lcall setstart inc r5 mov dptr, #string4 lcall writestr mov a, AD1DAT3 acall binasc lcall writetable mov a, r2 lcall writetable ljmp main setstart: ;lsb is top of column ;set page address (0..7) mov a, #22h lcall send_cmd mov a, r5 lcall send_cmd mov a, r5 lcall send_cmd ;set column address (0..127) mov a, #21h lcall send_cmd mov a, #00d lcall send_cmd mov a, #127d lcall send_cmd ret writestr: clr a ;clear Accumulator for any previous data movc a,@a+dptr ;load the ASCII character in accumulator inc dptr ;increment data pointer jz finishstr ;go to exit if zero lcall writetable sjmp writestr finishstr: ret ;=============================================================== ; subroutine write table values - assumes a contains ascii value ;=============================================================== writetable: clr C subb a, #32d mov b, #fontwidth mul ab ;calc the table offset for the first character segment inc AUXR1 ;swap dptr mov dptr, #font ;set second dptr to point to font table base address ; add character offset to table base address (16 bit addition is required) add a, dpl mov dpl, a mov a, dph addc a, b mov dph, a mov a, #00h lcall send_data mov r0, #fontwidth writeloop: mov a, #00h movc a,@a+dptr ;load the ASCII character in accumulator lcall send_data inc dptr ;increment data pointer djnz r0, writeloop dec AUXR1 ;swap dptr ret ;=============================================================== ; subroutine binasc ;=============================================================== binasc: mov r2, a ; save in r2 anl a, #0fh ; convert least sig digit. add a, #0f6h ; adjust it jnc noadj1 ; if a-f then readjust add a, #07h noadj1: add a, #3ah ; make ascii xch a, r2 ; put result in reg 2 swap a ; convert most sig digit anl a, #0fh ; look at least sig half of acc add a, #0f6h ; adjust it jnc noadj2 ; if a-f then re-adjust add a, #07h noadj2: add a, #3ah ; make ascii ret ;=============================================================== ; subroutine display clear ;=============================================================== clear: mov r2, #04h wait_0: mov r3, #00h ;reg2 and reg3 wait_1: mov a, #00000000b lcall send_data djnz r3, wait_1 djnz r2, wait_0 ret ;=============================================================== ; subroutine SPI send command / data ;=============================================================== send_data: SETB D_C AJMP skip1 send_cmd: CLR D_C skip1: MOV R7, #08H ;Load R7 to count bits RLC A ;Rotate MSB into Carry Bit loop3: CLR D0CLK ;Clock Low MOV D1DAT, C ;Move bit out to MOSI NOP SETB D0CLK ;Clock High NOP RLC A ;Rotate Carry Bit into A DJNZ R7, loop3 ;Loop for another bit until finished MOV R7, A ;Store return value in R7 CLR D0CLK ;Clock Low SETB D_C RET ;Return from routine ;=============================================================== ; subroutine delay ;=============================================================== long_delay: push 2 push 3 push 4 mov r2, #3fh ;initialise counters ajmp wait_2 delay: push 2 push 3 push 4 mov r2, #01h ;initialise counters wait_2: mov r3, #0ffh ;reg2 and reg3 wait_3: mov r4, #0ffh ;reg2 and reg3 wait_4: djnz r4, wait_4 djnz r3, wait_3 djnz r2, wait_2 pop 4 pop 3 pop 2 ret ;=============================================================== ; timer ISR ;=============================================================== timer_isr: ;hardware automatically clears TF0 and reloads TL0/TH0 ;stop timer clr TR0 push acc push psw ;reload TL0/TH0 mov TH0, #t0high ;reload count (high) mov TL0, #t0low ;reload count (low) mov a, count dec a cjne a, #00h, skip2 cpl LED mov a, #rcount skip2: mov count, a pop psw pop acc ;start timer setb TR0 reti ;=============================================================== ; ADC interrupt routine ;=============================================================== adc_isr: push acc push psw mov a, ADCON1 ; clear the ADC interrupt flag - must be done by software clr acc.3 mov ADCON1, a pop psw pop acc reti ;=============================================================== string1: DB 'AD0...',0h string2: DB 'AD1...',0h string3: DB 'AD2...',0h string4: DB 'AD3...',0h ;Terminal5x8 Font font: DB 00h DB 00h DB 00h DB 00h DB 00h ; Code for char "space" DB 00h DB 06h DB 5Fh DB 06h DB 00h ; Code for char ! DB 07h DB 03h DB 00h DB 07h DB 03h ; Code for char " DB 24h DB 7Eh DB 24h DB 7Eh DB 24h ; Code for char # DB 24h DB 2Bh DB 6Ah DB 12h DB 00h ; Code for char $ DB 63h DB 13h DB 08h DB 64h DB 63h ; Code for char % DB 36h DB 49h DB 56h DB 20h DB 50h ; Code for char & DB 00h DB 07h DB 03h DB 00h DB 00h ; Code for char ' DB 00h DB 3Eh DB 41h DB 00h DB 00h ; Code for char ( DB 00h DB 41h DB 3Eh DB 00h DB 00h ; Code for char ) DB 08h DB 3Eh DB 1Ch DB 3Eh DB 08h ; Code for char * DB 08h DB 08h DB 3Eh DB 08h DB 08h ; Code for char + DB 00h DB 0E0h DB 60h DB 00h DB 00h ; Code for char , DB 08h DB 08h DB 08h DB 08h DB 08h ; Code for char - DB 00h DB 60h DB 60h DB 00h DB 00h ; Code for char . DB 20h DB 10h DB 08h DB 04h DB 02h ; Code for char / DB 3Eh DB 51h DB 49h DB 45h DB 3Eh ; Code for char 0 DB 00h DB 42h DB 7Fh DB 40h DB 00h ; Code for char 1 DB 62h DB 51h DB 49h DB 49h DB 46h ; Code for char 2 DB 22h DB 49h DB 49h DB 49h DB 36h ; Code for char 3 DB 18h DB 14h DB 12h DB 7Fh DB 10h ; Code for char 4 DB 2Fh DB 49h DB 49h DB 49h DB 31h ; Code for char 5 DB 3Ch DB 4Ah DB 49h DB 49h DB 30h ; Code for char 6 DB 01h DB 71h DB 09h DB 05h DB 03h ; Code for char 7 DB 36h DB 49h DB 49h DB 49h DB 36h ; Code for char 8 DB 06h DB 49h DB 49h DB 29h DB 1Eh ; Code for char 9 DB 00h DB 6Ch DB 6Ch DB 00h DB 00h ; Code for char : DB 00h DB 0ECh DB 6Ch DB 00h DB 00h ; Code for char ; DB 08h DB 14h DB 22h DB 41h DB 00h ; Code for char < DB 24h DB 24h DB 24h DB 24h DB 24h ; Code for char = DB 00h DB 41h DB 22h DB 14h DB 08h ; Code for char > DB 02h DB 01h DB 59h DB 09h DB 06h ; Code for char ? DB 3Eh DB 41h DB 5Dh DB 55h DB 1Eh ; Code for char @ DB 7Eh DB 11h DB 11h DB 11h DB 7Eh ; Code for char A DB 7Fh DB 49h DB 49h DB 49h DB 36h ; Code for char B DB 3Eh DB 41h DB 41h DB 41h DB 22h ; Code for char C DB 7Fh DB 41h DB 41h DB 41h DB 3Eh ; Code for char D DB 7Fh DB 49h DB 49h DB 49h DB 41h ; Code for char E DB 7Fh DB 09h DB 09h DB 09h DB 01h ; Code for char F DB 3Eh DB 41h DB 49h DB 49h DB 7Ah ; Code for char G DB 7Fh DB 08h DB 08h DB 08h DB 7Fh ; Code for char H DB 00h DB 41h DB 7Fh DB 41h DB 00h ; Code for char I DB 30h DB 40h DB 40h DB 40h DB 3Fh ; Code for char J DB 7Fh DB 08h DB 14h DB 22h DB 41h ; Code for char K DB 7Fh DB 40h DB 40h DB 40h DB 40h ; Code for char L DB 7Fh DB 02h DB 04h DB 02h DB 7Fh ; Code for char M DB 7Fh DB 02h DB 04h DB 08h DB 7Fh ; Code for char N DB 3Eh DB 41h DB 41h DB 41h DB 3Eh ; Code for char O DB 7Fh DB 09h DB 09h DB 09h DB 06h ; Code for char P DB 3Eh DB 41h DB 51h DB 21h DB 5Eh ; Code for char Q DB 7Fh DB 09h DB 09h DB 19h DB 66h ; Code for char R DB 26h DB 49h DB 49h DB 49h DB 32h ; Code for char S DB 01h DB 01h DB 7Fh DB 01h DB 01h ; Code for char T DB 3Fh DB 40h DB 40h DB 40h DB 3Fh ; Code for char U DB 1Fh DB 20h DB 40h DB 20h DB 1Fh ; Code for char V DB 3Fh DB 40h DB 3Ch DB 40h DB 3Fh ; Code for char W DB 63h DB 14h DB 08h DB 14h DB 63h ; Code for char X DB 07h DB 08h DB 70h DB 08h DB 07h ; Code for char Y DB 71h DB 49h DB 45h DB 43h DB 00h ; Code for char Z DB 00h DB 7Fh DB 41h DB 41h DB 00h ; Code for char [ DB 02h DB 04h DB 08h DB 10h DB 20h ; Code for char \ DB 00h DB 41h DB 41h DB 7Fh DB 00h ; Code for char ] DB 04h DB 02h DB 01h DB 02h DB 04h ; Code for char ^ DB 80h DB 80h DB 80h DB 80h DB 80h ; Code for char _ END