;port definitions
P1M0x   equ  0C2h
P1M1x   equ  0C3h
P3M0x   equ  0C6h
P3M1x   equ  0C7h

;SPI definitions

SPCRx   equ  0D5h
SPSRx   equ  0AAh
SPDRx   equ  86h
ss      equ  P1.4

stack   equ 02fh ;begin stack after last data in internal RAM

;timer/clock definitions
rl0     equ  92h
rh0     equ  94h

clkcnth equ  03h   ;1sec counter (high)
clkcntl equ  0E8h  ;1sec counter (low)

ov_counth     equ 23h
ov_countl     equ 24h
tchanged_flag equ 00h ;bit 1 is flag for time change
tick_flag     equ 01h ;bit 1 is flag for time change

digit1 equ 25h
digit2 equ 26h
digit3 equ 27h
digit4 equ 28h

;=================================================================
; 89LP4052 hardware vectors
;=================================================================
org 0000h                ; power up and reset vector
   ajmp start
org 0003h                ; interrupt 0 vector
   ajmp start
org 000Bh                ; timer 0 interrupt vector
   ajmp timer0_isr
org 0013h                ; interrupt 1 vector
   ajmp start
org 001Bh                ; timer 1 interrupt vector
   ajmp start
org 0023h                ; serial port interrupt vector
   ajmp start
org 0033h                ; serial port interrupt vector
   ajmp start

org     0060h
start:
        ;Preset the ports to enable quasi-bidirectional state
        mov     P1M0x, #00000000b
        mov     P1M1x, #00000000b
        mov     P3M0x, #00000000b
        mov     P3M1x, #00000000b

        mov     p3, #0ffh
        mov     p1, #0ffh

        mov     ie, #00h       ;turn off all interrupts
        mov     sp, #stack

        mov     digit1, #00h
        mov     digit2, #00h
        mov     digit3, #00h
        mov     digit4, #00h

        clr     tchanged_flag    ;clears the time changed flag
        clr     tick_flag        ;clears the tick flag

        mov     ov_counth, #clkcnth
        mov     ov_countl, #clkcntl
        clr     tr0             ;make sure timer 0 is stopped
        clr     tf0             ;clear the overflow flag

        mov     a, tmod
        clr     acc.3           ;set to mode 1
        clr     acc.2           ;
        clr     acc.1           ;
        setb    acc.0           ;
        mov     tmod, a

        mov     th0, #00h      ;clear the timer 0 value
        mov     tl0, #00h

        mov     rh0, #0B1h      ;configure the reload value (1ms)
        mov     rl0, #0E0h      ;assumes lp4052 with 20MHz crystal

        mov     ip, #0         ;set interrupt priorities (all low)
        mov     ie, #82h       ;enable timer0 interrupt


        mov     SPCRx, #00010001b
        mov     SPCRx, #01010001b ;enable SPE

        lcall   long_delay

        clr     ss
        mov     SPDRx, #00000000b
swait0: mov     a, SPSRx
        jnb     acc.7, swait0
        mov     a, SPDRx
        setb    ss

        lcall   long_delay

        clr     ss
        mov     SPDRx, #00h

swait2: mov     a, SPSRx
        jnb     acc.7, swait2
        mov     a, SPDRx

        mov     SPDRx, #00h
swait3: mov     a, SPSRx
        jnb     acc.7, swait3
        mov     a, SPDRx

        mov     SPDRx, #00h
swait4: mov     a, SPSRx
        jnb     acc.7, swait4
        mov     a, SPDRx
        setb    ss

        clr     ss
        mov     SPDRx, #00000001b
swait1: mov     a, SPSRx
        jnb     acc.7, swait1
        mov     a, SPDRx
        setb    ss

        lcall   long_delay

        setb    tr0            ;start the timer

main:
        jnb     tchanged_flag, main ;update count if the flag shows there has been a change
        clr     tchanged_flag

inc_count:
        inc     digit1
        mov     a, digit1
        anl     a, #0Fh
        cjne    a, #0Ah, inc_end
        mov     digit1, #0
        inc     digit2
        mov     a, digit2
        anl     a, #0Fh
        cjne    a, #0Ah, inc_end
        mov     digit2, #0
        inc     digit3
        mov     a, digit3
        anl     a, #0Fh
        cjne    a, #0Ah, inc_end
        mov     digit3, #0
        inc     digit4
        mov     a, digit4
        anl     a, #0Fh
        cjne    a, #0Ah, inc_end
        mov     digit4, #0
inc_end:

        mov     a, digit4
        rl      a
        rl      a
        rl      a
        rl      a
        orl     a, digit3
        mov     r1, a

        mov     a, digit2
        rl      a
        rl      a
        rl      a
        rl      a
        orl     a, digit1
        mov     r0, a

        clr     ss

        jb      tick_flag, tick1
        mov     SPDRx, #10110000b
        sjmp    swait5
tick1:
        mov     SPDRx, #10000000b

swait5: mov     a, SPSRx
        jnb     acc.7, swait5
        mov     a, SPDRx

        mov     SPDRx, r1
swait6: mov     a, SPSRx
        jnb     acc.7, swait6
        mov     a, SPDRx

        mov     SPDRx, r0
swait7: mov     a, SPSRx
        jnb     acc.7, swait7
        mov     a, SPDRx
        setb    ss

        ljmp    main

;===============================================================
; subroutine delay
;===============================================================
long_delay:
   mov  r2, #3fh    ;initialise counters
   ajmp wait_0

delay:
   mov  r2, #01h   ;initialise counters

wait_0:
   mov  r3, #0ffh   ;reg2 and reg3

wait_1:
   mov  r4, #0ffh   ;reg2 and reg3

wait_2:
   djnz r4, wait_2
   djnz r3, wait_1
   djnz r2, wait_0
   ret

;===============================================================
;this interrupt service routine will run every time timer0 sets
;the TF0 flag.  The 4052 hardware automatically clears TF0 for
;us.  As with all interrupts, we must be very careful to save
;any registers that get changed.
;===============================================================
timer0_isr:
    clr     tr0
    djnz    ov_countl, timer0_end

    mov     a, ov_counth
    cjne    a, #00h, isr_skip1
    mov     ov_countl, #clkcntl
    mov     ov_counth, #clkcnth
    setb    tchanged_flag              ;set a flag to alert the main program to change
    cpl     tick_flag
    ajmp    timer0_end

isr_skip1:
    dec     ov_counth
    mov     ov_countl, #0FFh

timer0_end:
    setb    tr0
    reti

end